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You can't verify what you can't specify

Back when I was studying for my master degree, Prof. Axel van Lamsweerde wasteaching us formal logic. Axel is world-famous for his works on requirementsengineering, that is, the proce...

In overview, research, network, verification, By Laurent Vanbever, May 11, 2020

Toward modular network verification

Almost all of the techniques for network verification to date must analyze the entire network’s state and/or configuration data monolithically. In contrast, methodologies for verific...

In research, network, verification, By Todd Millstein, May 01, 2020

Capturing the state of research on network verification

Verification and synthesis are old problems in computer science. Verification seeks to answer the question: “can any input to a program result in that program producing an incorrect o...

In overview, research, network, verification, By Ryan Beckett, Ratul Mahajan, Apr 20, 2020

Welcome to netverify.fun

Network verification and synthesis has emerged as an exciting research area at the intersection of networking, programming languages, and formal methods. Work in this area is motivate...

In network, verification, synthesis, welcome, By Ratul Mahajan, Ryan Beckett, Apr 20, 2020